When a semiconductor device such as a metal-oxide-semiconductor field-effect transistors (MOSFETs) is scaled down through various technology nodes, high k dielectric material and metal are adopted to form a gate stack. In addition, strained structures utilizing epitaxy silicon germanium (SiGe) may be used to enhance carrier mobility. However, current techniques to form these strained structures have not been satisfactory in all respects. For example, these strained structures may not produce enough stress in a channel region to improve the device performance.